1. Field of the Invention
The present invention relates to buffer circuits for digital signals, and in particular to low noise buffer circuits for increasing the slew rates of transitions between signal states of a digital signal while drawing minimal transient power supply current during such signal state transitions.
2. Description of the Related Art
With increasing diversity among the types of circuits which must coexist in the same integrated circuit, signal crosstalk, power supply transients and other forms of "noise" become more prevalent. For example, with both low noise analog circuits and logic circuits integrated on the same chip, problems often develop within the analog circuitry due to large transients being injected on the shared power supply and ground lines by the logic circuits. Complementary metal oxide semiconductor (CMOS) clock circuits are often among the worst offenders due to the large "shoot-through" currents conducted by the CMOS inverters which build up, or buffer, a small internal oscillator signal to a full rail-to-rail output signal.
Accordingly, it would desirable to have a buffer circuit suitable for use in mixed-signal integrated circuits which allows the slew rates of digital signal transitions to be significantly increased while drawing minimal transient power supply current during such signal state transitions.